Autonomous driving computing requirements swing between two opposing extremes: heavy computer vision perception requires raw multithreaded integer and floating-point throughput, while chassis trajectory planning requires absolute, certifiable safety. ARM Split-Lock technology in Cortex-A78AE and Cortex-R52 processors resolves this dilemma by allowing SoC designers and software architects to choose mode dynamically on system boot.
In Split mode, a quad-core cluster functions as four independent 64-bit application processors, maximizing Dhrystone MIPS for infotainment rendering and multi-camera streaming. In Lockstep mode, Core 0 pairs with Core 1, and Core 2 pairs with Core 3. Effective compute capacity is halved, but hardware comparators verify execution continuously, fulfilling ASIL-D without requiring redundant external microcontrollers.